To Implement Paging Technique for Memory Management

L.A.S and P.A.S Procedure

1. Enter the required values.
2. Click on the SUBMIT button to verify the values.
3. Click on NEXT to proceed further.

Mapping Procedure

1. Generate Process and Observe Page Division
   • Action: Click on PROCESS to generate a process of size 8B. This process consists of 8 instructions, each 1B in size.
   • Observation:
     
     • Page Division: Since the page size is 4 bytes, the process will be divided into two pages:
       • Page 0: Contains the first 4 bytes (Instructions 1 to 4).
       • Page 1: Contains the remaining 4 bytes (Instructions 5 to 8).
   • Loading into Secondary Memory: Observe how this process is initially placed in secondary memory (such as a disk). The entire 8B process is stored here before it is loaded into main memory.
2. Load Process into Main Memory
   • Action: Click on LOAD to load the process from secondary memory into Main Memory (RAM).
   • Observation:
     • Memory Allocation: The 8B process is loaded into RAM. Check how the pages are placed in physical memory, and observe which frames are allocated for each page.
3. Generate Page Table and Set PTBR
   • Action: Click on TABLE to generate a Page Table.
   • Additional Action: Store the base address of this page table in the Page Table Base Register (PTBR).
   • Observation:
     • Page Table: This table maps logical page numbers to physical frame numbers. For example, it might look something like this:
       • Page 0 → Frame 1 (F1)
       • Page 1 → Frame 2 (F2)
     • PTBR Setting: The PTBR now holds the address where the page table begins, enabling the system to perform address translations.
4. Generate Logical Address:
   • Action: Click on CPU to generate a Logical Address.
   • Observation:
     • Logical Address: This address typically includes a page number and an offset within that page. For example, a logical address might be represented as (Page Number, Offset).
5. Initiate Scaling and Address Translation:
   • Action:
     • Click on the Plus sign to initiate scaling. This action will calculate the actual location of the page entry in the table.
     • Enter the following values:
       • PTBR value: The address of the page table.
       • Page Number (p): The page number from the logical address.
     • Observation:
       • Address Translation: The system will use the page number to look up the corresponding frame in the page table. It will then combine this frame number with the offset to produce the physical address. For example:
         • If the page table maps Page 0 to Frame 1, and the offset is 2B, the physical address would be the starting address of Frame 1 plus 2B.
   • Observe Mapping Performance
     • Action: Observe how the mapping is performed.
     • Observation:
       • Physical Address: You should see the physical address computed from the logical address. This demonstrates how the logical address components are translated into a physical address using the page table and the information provided.